module tcam8_lookup (
    input wire clk,
    input wire rst,
    input wire [7:0] lookup_key,
    input wire wr_en,
    input wire [2:0] wr_addr,
    input wire wr_clear,
    input wire [7:0] wr_key,
    input wire [7:0] wr_mask,
    input wire [7:0] wr_value,
    output reg match,
    output reg [2:0] match_idx,
    output reg [7:0] match_value
);
    reg [7:0] valid_mem;
    reg [7:0] key_mem [0:7];
    reg [7:0] mask_mem [0:7];
    reg [7:0] value_mem [0:7];

    integer i;

    always @(posedge clk) begin
        if (rst) begin
            valid_mem <= 8'h00;
            for (i = 0; i < 8; i = i + 1) begin
                key_mem[i] <= 8'h00;
                mask_mem[i] <= 8'h00;
                value_mem[i] <= 8'h00;
            end
        end else if (wr_en) begin
            if (wr_clear) begin
                valid_mem[wr_addr] <= 1'b0;
                key_mem[wr_addr] <= 8'h00;
                mask_mem[wr_addr] <= 8'h00;
                value_mem[wr_addr] <= 8'h00;
            end else begin
                valid_mem[wr_addr] <= 1'b1;
                key_mem[wr_addr] <= wr_key;
                mask_mem[wr_addr] <= wr_mask;
                value_mem[wr_addr] <= wr_value;
            end
        end
    end

    always @* begin
        match = 1'b0;
        match_idx = 3'b000;
        match_value = 8'h00;

        if (!rst) begin
            for (i = 0; i < 8; i = i + 1) begin
                if (!match &&
                    valid_mem[i] &&
                    (((lookup_key ^ key_mem[i]) & mask_mem[i]) == 8'h00)) begin
                    match = 1'b1;
                    match_idx = i[2:0];
                    match_value = value_mem[i];
                end
            end
        end
    end
endmodule