module pwm_deadtime (
    input wire clk,
    input wire rst,
    input wire enable,
    input wire [7:0] period,
    input wire [7:0] duty,
    input wire [3:0] dead_time,
    output reg pwm_high,
    output reg pwm_low
);
    reg [7:0] counter;
    reg raw_valid;
    reg raw_state;
    reg pending_raw;
    reg dead_active;
    reg [3:0] dead_count;
    wire current_raw;

    function raw_high;
        input [7:0] counter_value;
        input [7:0] period_value;
        input [7:0] duty_value;
        begin
            raw_high = (duty_value != 8'd0) &&
                       ((duty_value >= period_value) || (counter_value < duty_value));
        end
    endfunction

    assign current_raw = raw_high(counter, period, duty);

    always @(posedge clk) begin
        if (rst) begin
            counter <= 8'd0;
            raw_valid <= 1'b0;
            raw_state <= 1'b0;
            pending_raw <= 1'b0;
            dead_active <= 1'b0;
            dead_count <= 4'd0;
            pwm_high <= 1'b0;
            pwm_low <= 1'b0;
        end else if (!enable) begin
            counter <= 8'd0;
            raw_valid <= 1'b0;
            raw_state <= 1'b0;
            pending_raw <= 1'b0;
            dead_active <= 1'b0;
            dead_count <= 4'd0;
            pwm_high <= 1'b0;
            pwm_low <= 1'b0;
        end else begin
            if (!raw_valid) begin
                raw_valid <= 1'b1;
                raw_state <= current_raw;
                pending_raw <= current_raw;
                dead_active <= 1'b0;
                dead_count <= 4'd0;
                pwm_high <= current_raw;
                pwm_low <= ~current_raw;
            end else if (current_raw != raw_state) begin
                raw_state <= current_raw;
                pending_raw <= current_raw;
                if (dead_time != 4'd0) begin
                    dead_active <= 1'b1;
                    dead_count <= dead_time - 4'd1;
                    pwm_high <= 1'b0;
                    pwm_low <= 1'b0;
                end else begin
                    dead_active <= 1'b0;
                    dead_count <= 4'd0;
                    pwm_high <= current_raw;
                    pwm_low <= ~current_raw;
                end
            end else if (dead_active) begin
                if (dead_count != 4'd0) begin
                    dead_count <= dead_count - 4'd1;
                    pwm_high <= 1'b0;
                    pwm_low <= 1'b0;
                end else begin
                    dead_active <= 1'b0;
                    pwm_high <= pending_raw;
                    pwm_low <= ~pending_raw;
                end
            end else begin
                pwm_high <= current_raw;
                pwm_low <= ~current_raw;
            end

            if (counter == period - 8'd1)
                counter <= 8'd0;
            else
                counter <= counter + 8'd1;
        end
    end
endmodule